1. Field of Invention
The present invention relates to an operation method of a memory, and more particularly to an operation method of a multi-level memory.
2. Description of Related Art
The memory size is larger and larger along with increasing sizes of application software of a computer. Therefore, the conventional memory device for storing a bit or two bits can not satisfy the current demands. In this regard, a memory device able to store multi-bit data is provided in recent years, which is termed as a multi-level memory.
Generally, in a multi-level memory with two storage positions, in order to determine the level of one storage position, a standard read voltage is usually applied to one doped region adjacent to another storage position. However, when the another storage position adjacent to the one doped region is not stored with charges (i.e. the another storage position is at the lowest level), the generated current upon the application of the standard read voltage may cause a serious read disturbance and thereby affect the accuracy of the read level. Besides, when the two storage positions are not stored with charges (i.e. the two storage positions are both at the lowest level), such read disturbance is particularly serious.